Conventionally, in the processing of writing and reading image data with respect to image domains in SDRAM, respective pixel data constituting the image data are sequentially written in each of the recoding domains in the SDRAM in the order of the pixel layout on the image data and read therefrom. In the SDRAM, the image data is sequentially stored in each of the recording domains designated by Row and Column addresses and read therefrom.
In the SDRAM, burst read, which is a processing aimed for time reduction in data transfer, is generally implemented. The processing is implemented based on that a plurality of the recording domains in memory devices, including the SDRAM, shares a Row address. More specifically, when a plurality of the recording domains sharing the common Row address are designated, the common address is first designated, and the Column addresses are then sequentially designated to thereby designate the respective recording domains. In this manner, the Row address is commonly designated in the plural recording domains, which serves to reduce time required for transferring the image data.
In some cases, the writing/reading processing of the image with respect to the SDRAM additively includes rotation of the image data. When the rotation is implemented, as disclosed in No. 2002-259208 of the publication of unexamined patent applications, the image rotation processing is implemented mainly when reading the image data from the SDRAM.
In the conventional image processing apparatuses, however, the image rotation processing leads the burst read processing to be implemented with more difficulty and leads the processing to require more time. This problem is described below.
The implementation of the image rotation processing at an optional angle requires a great deal of time. In contrast to that, when the image rotation processing is implemented at 90° pitch (90°×s (s: integer, 1≦s≦3)), the processing can be implemented by means of backward read of the addresses or horizontally and vertically backward layout of the image, either of which requires a relatively short time. For the reason, the image rotation processing is usually implemented at 90° pitch.
The horizontally and vertically backward layout of the image is implemented by misreading the Column addresses as the Row addresses. In such address misreading, the Row address is to be changed per pixel data when the image data is read.
The burst read can only be implemented when the common Row address is shared in writing and reading the image data with respect to the SDRAM. The burst read is, therefore, infeasible in the conventional image rotation processing which requires the change of the Row address per pixel data when the image data is read. This inevitably lengthens the processing time.